ATmega8GPSLoggerBasismodul  20131018
uart.c
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1 /*************************************************************************/
41 #include <avr/io.h>
42 #include <avr/interrupt.h>
43 #include <avr/pgmspace.h>
44 #include "uart.h"
45 
46 
52 #define UART_RX_BUFFER_MASK ( UART_RX_BUFFER_SIZE - 1)
53 #define UART_TX_BUFFER_MASK ( UART_TX_BUFFER_SIZE - 1)
54 
55 #if ( UART_RX_BUFFER_SIZE & UART_RX_BUFFER_MASK )
56 #error RX buffer size is not a power of 2
57 #endif
58 #if ( UART_TX_BUFFER_SIZE & UART_TX_BUFFER_MASK )
59 #error TX buffer size is not a power of 2
60 #endif
61 
62 #if defined(__AVR_AT90S2313__) \
63  || defined(__AVR_AT90S4414__) || defined(__AVR_AT90S4434__) \
64  || defined(__AVR_AT90S8515__) || defined(__AVR_AT90S8535__) \
65  || defined(__AVR_ATmega103__)
66 
67  #define AT90_UART
68  #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV
69  #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA
70  #define UART0_STATUS USR
71  #define UART0_CONTROL UCR
72  #define UART0_DATA UDR
73  #define UART0_UDRIE UDRIE
74 #elif defined(__AVR_AT90S2333__) || defined(__AVR_AT90S4433__)
75 
76  #define AT90_UART
77  #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV
78  #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA
79  #define UART0_STATUS UCSRA
80  #define UART0_CONTROL UCSRB
81  #define UART0_DATA UDR
82  #define UART0_UDRIE UDRIE
83 #elif defined(__AVR_ATmega8__) || defined(__AVR_ATmega16__) || defined(__AVR_ATmega32__) \
84  || defined(__AVR_ATmega8515__) || defined(__AVR_ATmega8535__) \
85  || defined(__AVR_ATmega323__)
86 
87  #define ATMEGA_USART
88  #define UART0_RECEIVE_INTERRUPT USART_RXC_vect
89  #define UART0_TRANSMIT_INTERRUPT USART_UDRE_vect
90  #define UART0_STATUS UCSRA
91  #define UART0_CONTROL UCSRB
92  #define UART0_DATA UDR
93  #define UART0_UDRIE UDRIE
94 #elif defined(__AVR_ATmega163__)
95 
96  #define ATMEGA_UART
97  #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV
98  #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA
99  #define UART0_STATUS UCSRA
100  #define UART0_CONTROL UCSRB
101  #define UART0_DATA UDR
102  #define UART0_UDRIE UDRIE
103 #elif defined(__AVR_ATmega162__)
104 
105  #define ATMEGA_USART0
106  #define ATMEGA_USART1
107  #define UART0_RECEIVE_INTERRUPT SIG_USART0_RECV
108  #define UART1_RECEIVE_INTERRUPT SIG_USART1_RECV
109  #define UART0_TRANSMIT_INTERRUPT SIG_USART0_DATA
110  #define UART1_TRANSMIT_INTERRUPT SIG_USART1_DATA
111  #define UART0_STATUS UCSR0A
112  #define UART0_CONTROL UCSR0B
113  #define UART0_DATA UDR0
114  #define UART0_UDRIE UDRIE0
115  #define UART1_STATUS UCSR1A
116  #define UART1_CONTROL UCSR1B
117  #define UART1_DATA UDR1
118  #define UART1_UDRIE UDRIE1
119 #elif defined(__AVR_ATmega64__) || defined(__AVR_ATmega128__)
120 
121  #define ATMEGA_USART0
122  #define ATMEGA_USART1
123  #define UART0_RECEIVE_INTERRUPT SIG_UART0_RECV
124  #define UART1_RECEIVE_INTERRUPT SIG_UART1_RECV
125  #define UART0_TRANSMIT_INTERRUPT SIG_UART0_DATA
126  #define UART1_TRANSMIT_INTERRUPT SIG_UART1_DATA
127  #define UART0_STATUS UCSR0A
128  #define UART0_CONTROL UCSR0B
129  #define UART0_DATA UDR0
130  #define UART0_UDRIE UDRIE0
131  #define UART1_STATUS UCSR1A
132  #define UART1_CONTROL UCSR1B
133  #define UART1_DATA UDR1
134  #define UART1_UDRIE UDRIE1
135 #elif defined(__AVR_ATmega161__)
136 
137  #error "AVR ATmega161 currently not supported by this libaray !"
138 #elif defined(__AVR_ATmega169__)
139 
140  #define ATMEGA_USART
141  #define UART0_RECEIVE_INTERRUPT SIG_USART_RECV
142  #define UART0_TRANSMIT_INTERRUPT SIG_USART_DATA
143  #define UART0_STATUS UCSRA
144  #define UART0_CONTROL UCSRB
145  #define UART0_DATA UDR
146  #define UART0_UDRIE UDRIE
147 #elif defined(__AVR_ATmega48__) ||defined(__AVR_ATmega88__) || defined(__AVR_ATmega168__)
148 
149  #define ATMEGA_USART0
150  #define UART0_RECEIVE_INTERRUPT SIG_USART_RECV
151  #define UART0_TRANSMIT_INTERRUPT SIG_USART_DATA
152  #define UART0_STATUS UCSR0A
153  #define UART0_CONTROL UCSR0B
154  #define UART0_DATA UDR0
155  #define UART0_UDRIE UDRIE0
156 #elif defined(__AVR_ATtiny2313__)
157  #define ATMEGA_USART
158  #define UART0_RECEIVE_INTERRUPT SIG_USART0_RX
159  #define UART0_TRANSMIT_INTERRUPT SIG_USART0_UDRE
160  #define UART0_STATUS UCSRA
161  #define UART0_CONTROL UCSRB
162  #define UART0_DATA UDR
163  #define UART0_UDRIE UDRIE
164 #elif defined(__AVR_ATmega329__) ||defined(__AVR_ATmega3290__) ||\
165  defined(__AVR_ATmega649__) ||defined(__AVR_ATmega6490__) ||\
166  defined(__AVR_ATmega325__) ||defined(__AVR_ATmega3250__) ||\
167  defined(__AVR_ATmega645__) ||defined(__AVR_ATmega6450__)
168 
169  #define ATMEGA_USART0
170  #define UART0_RECEIVE_INTERRUPT SIG_UART_RECV
171  #define UART0_TRANSMIT_INTERRUPT SIG_UART_DATA
172  #define UART0_STATUS UCSR0A
173  #define UART0_CONTROL UCSR0B
174  #define UART0_DATA UDR0
175  #define UART0_UDRIE UDRIE0
176 #elif defined(__AVR_ATmega2560__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega640__)
177 
178  #define ATMEGA_USART0
179  #define ATMEGA_USART1
180  #define UART0_RECEIVE_INTERRUPT SIG_USART0_RECV
181  #define UART1_RECEIVE_INTERRUPT SIG_USART1_RECV
182  #define UART0_TRANSMIT_INTERRUPT SIG_USART0_DATA
183  #define UART1_TRANSMIT_INTERRUPT SIG_USART1_DATA
184  #define UART0_STATUS UCSR0A
185  #define UART0_CONTROL UCSR0B
186  #define UART0_DATA UDR0
187  #define UART0_UDRIE UDRIE0
188  #define UART1_STATUS UCSR1A
189  #define UART1_CONTROL UCSR1B
190  #define UART1_DATA UDR1
191  #define UART1_UDRIE UDRIE1
192 #elif defined(__AVR_ATmega644__)
193 
194  #define ATMEGA_USART0
195  #define UART0_RECEIVE_INTERRUPT SIG_USART_RECV
196  #define UART0_TRANSMIT_INTERRUPT SIG_USART_DATA
197  #define UART0_STATUS UCSR0A
198  #define UART0_CONTROL UCSR0B
199  #define UART0_DATA UDR0
200  #define UART0_UDRIE UDRIE0
201 #elif defined(__AVR_ATmega164P__) || defined(__AVR_ATmega324P__) || defined(__AVR_ATmega644P__)
202 
203  #define ATMEGA_USART0
204  #define ATMEGA_USART1
205  #define UART0_RECEIVE_INTERRUPT SIG_USART_RECV
206  #define UART1_RECEIVE_INTERRUPT SIG_USART1_RECV
207  #define UART0_TRANSMIT_INTERRUPT SIG_USART_DATA
208  #define UART1_TRANSMIT_INTERRUPT SIG_USART1_DATA
209  #define UART0_STATUS UCSR0A
210  #define UART0_CONTROL UCSR0B
211  #define UART0_DATA UDR0
212  #define UART0_UDRIE UDRIE0
213  #define UART1_STATUS UCSR1A
214  #define UART1_CONTROL UCSR1B
215  #define UART1_DATA UDR1
216  #define UART1_UDRIE UDRIE1
217 #else
218  #error "no UART definition for MCU available"
219 #endif
220 
221 
225 static volatile unsigned char UART_TxBuf[UART_TX_BUFFER_SIZE];
226 static volatile unsigned char UART_RxBuf[UART_RX_BUFFER_SIZE];
227 static volatile unsigned char UART_TxHead;
228 static volatile unsigned char UART_TxTail;
229 static volatile unsigned char UART_RxHead;
230 static volatile unsigned char UART_RxTail;
231 static volatile unsigned char UART_LastRxError;
232 
233 #if defined( ATMEGA_USART1 )
234 static volatile unsigned char UART1_TxBuf[UART_TX_BUFFER_SIZE];
235 static volatile unsigned char UART1_RxBuf[UART_RX_BUFFER_SIZE];
236 static volatile unsigned char UART1_TxHead;
237 static volatile unsigned char UART1_TxTail;
238 static volatile unsigned char UART1_RxHead;
239 static volatile unsigned char UART1_RxTail;
240 static volatile unsigned char UART1_LastRxError;
241 #endif
242 
243 
244 /*************************************************************************/
248 SIGNAL(UART0_RECEIVE_INTERRUPT)
249 {
250  unsigned char tmphead;
251  unsigned char data;
252  unsigned char usr;
253  unsigned char lastRxError;
254 
255 
257  usr = UART0_STATUS;
258  data = UART0_DATA;
259 
260 #if defined( AT90_UART )
261  lastRxError = (usr & (_BV(FE)|_BV(DOR)) );
262 #elif defined( ATMEGA_USART )
263  lastRxError = (usr & (_BV(FE)|_BV(DOR)) );
264 #elif defined( ATMEGA_USART0 )
265  lastRxError = (usr & (_BV(FE0)|_BV(DOR0)) );
266 #elif defined ( ATMEGA_UART )
267  lastRxError = (usr & (_BV(FE)|_BV(DOR)) );
268 #endif
269 
271  tmphead = ( UART_RxHead + 1) & UART_RX_BUFFER_MASK;
272 
273  if ( tmphead == UART_RxTail ) {
275  lastRxError = UART_BUFFER_OVERFLOW >> 8;
276  }else{
278  UART_RxHead = tmphead;
280  UART_RxBuf[tmphead] = data;
281  }
282  UART_LastRxError = lastRxError;
283 }
284 
285 
286 /*************************************************************************/
290 SIGNAL(UART0_TRANSMIT_INTERRUPT)
291 {
292  unsigned char tmptail;
293 
294 
295  if ( UART_TxHead != UART_TxTail) {
297  tmptail = (UART_TxTail + 1) & UART_TX_BUFFER_MASK;
298  UART_TxTail = tmptail;
300  UART0_DATA = UART_TxBuf[tmptail]; /* start transmission */
301  }else{
303  UART0_CONTROL &= ~_BV(UART0_UDRIE);
304  }
305 }
306 
307 
308 /*************************************************************************/
313 void uart_init(unsigned int baudrate)
314 {
315  UART_TxHead = 0;
316  UART_TxTail = 0;
317  UART_RxHead = 0;
318  UART_RxTail = 0;
319 
320 #if defined( AT90_UART )
321 
322  UBRR = (unsigned char)baudrate;
323 
325  UART0_CONTROL = _BV(RXCIE)|_BV(RXEN)|_BV(TXEN);
326 
327 #elif defined (ATMEGA_USART)
328 
329  if ( baudrate & 0x8000 )
330  {
331  UART0_STATUS = (1<<U2X);
332  baudrate &= ~0x8000;
333  }
334  UBRRH = (unsigned char)(baudrate>>8);
335  UBRRL = (unsigned char) baudrate;
336 
338  UART0_CONTROL = _BV(RXCIE)|(1<<RXEN)|(1<<TXEN);
339 
341  #ifdef URSEL
342  UCSRC = (1<<URSEL)|(3<<UCSZ0);
343  #else
344  UCSRC = (3<<UCSZ0);
345  #endif
346 
347 #elif defined (ATMEGA_USART0 )
348 
349  if ( baudrate & 0x8000 )
350  {
351  UART0_STATUS = (1<<U2X0);
352  baudrate &= ~0x8000;
353  }
354  UBRR0H = (unsigned char)(baudrate>>8);
355  UBRR0L = (unsigned char) baudrate;
356 
358  UART0_CONTROL = _BV(RXCIE0)|(1<<RXEN0)|(1<<TXEN0);
359 
361  #ifdef URSEL0
362  UCSR0C = (1<<URSEL0)|(3<<UCSZ00);
363  #else
364  UCSR0C = (3<<UCSZ00);
365  #endif
366 
367 #elif defined ( ATMEGA_UART )
368 
369  if ( baudrate & 0x8000 )
370  {
371  UART0_STATUS = (1<<U2X);
372  baudrate &= ~0x8000;
373  }
374  UBRRHI = (unsigned char)(baudrate>>8);
375  UBRR = (unsigned char) baudrate;
376 
378  UART0_CONTROL = _BV(RXCIE)|(1<<RXEN)|(1<<TXEN);
379 
380 #endif
381 
382 }
383 
384 /*************************************************************************/
390 unsigned int uart_getc(void)
391 {
392  unsigned char tmptail;
393  unsigned char data;
394 
395 
396  if ( UART_RxHead == UART_RxTail ) {
397  return UART_NO_DATA;
398  }
399 
401  tmptail = (UART_RxTail + 1) & UART_RX_BUFFER_MASK;
402  UART_RxTail = tmptail;
403 
405  data = UART_RxBuf[tmptail];
406 
407  return (UART_LastRxError << 8) + data;
408 
409 }
410 
411 /*************************************************************************/
416 void uart_putc(unsigned char data)
417 {
418  unsigned char tmphead;
419 
420 
421  tmphead = (UART_TxHead + 1) & UART_TX_BUFFER_MASK;
422 
423  while ( tmphead == UART_TxTail ){
424  ;
425  }
426 
427  UART_TxBuf[tmphead] = data;
428  UART_TxHead = tmphead;
429 
431  UART0_CONTROL |= _BV(UART0_UDRIE);
432 
433 }
434 
435 /*************************************************************************/
440 void uart_puts(const char *s )
441 {
442  while (*s)
443  uart_putc(*s++);
444 
445 }
446 
447 /*************************************************************************/
452 void uart_puts_p(const char *progmem_s )
453 {
454  register char c;
455 
456  while ( (c = pgm_read_byte(progmem_s++)) )
457  uart_putc(c);
458 
459 }
465 #if defined( ATMEGA_USART1 )
466 
467 /*************************************************************************/
471 SIGNAL(UART1_RECEIVE_INTERRUPT)
472 {
473  unsigned char tmphead;
474  unsigned char data;
475  unsigned char usr;
476  unsigned char lastRxError;
477 
478 
480  usr = UART1_STATUS;
481  data = UART1_DATA;
482 
483  lastRxError = (usr & (_BV(FE1)|_BV(DOR1)) );
484 
486  tmphead = ( UART1_RxHead + 1) & UART_RX_BUFFER_MASK;
487 
488  if ( tmphead == UART1_RxTail ) {
490  lastRxError = UART_BUFFER_OVERFLOW >> 8;
491  }else{
493  UART1_RxHead = tmphead;
495  UART1_RxBuf[tmphead] = data;
496  }
497  UART1_LastRxError = lastRxError;
498 }
499 
500 
501 /*************************************************************************/
505 SIGNAL(UART1_TRANSMIT_INTERRUPT)
506 {
507  unsigned char tmptail;
508 
509 
510  if ( UART1_TxHead != UART1_TxTail) {
512  tmptail = (UART1_TxTail + 1) & UART_TX_BUFFER_MASK;
513  UART1_TxTail = tmptail;
515  UART1_DATA = UART1_TxBuf[tmptail];
516  }else{
518  UART1_CONTROL &= ~_BV(UART1_UDRIE);
519  }
520 }
521 
522 /*************************************************************************/
527 void uart1_init(unsigned int baudrate)
528 {
529  UART1_TxHead = 0;
530  UART1_TxTail = 0;
531  UART1_RxHead = 0;
532  UART1_RxTail = 0;
533 
534 
536  if ( baudrate & 0x8000 )
537  {
538  UART1_STATUS = (1<<U2X1);
539  baudrate &= ~0x8000;
540  }
541  UBRR1H = (unsigned char)(baudrate>>8);
542  UBRR1L = (unsigned char) baudrate;
543 
545  UART1_CONTROL = _BV(RXCIE1)|(1<<RXEN1)|(1<<TXEN1);
546 
548  #ifdef URSEL1
549  UCSR1C = (1<<URSEL1)|(3<<UCSZ10);
550  #else
551  UCSR1C = (3<<UCSZ10);
552  #endif
553 }
554 
555 /*************************************************************************/
561 unsigned int uart1_getc(void)
562 {
563  unsigned char tmptail;
564  unsigned char data;
565 
566 
567  if ( UART1_RxHead == UART1_RxTail ) {
568  return UART_NO_DATA;
569  }
570 
572  tmptail = (UART1_RxTail + 1) & UART_RX_BUFFER_MASK;
573  UART1_RxTail = tmptail;
574 
576  data = UART1_RxBuf[tmptail];
577 
578  return (UART1_LastRxError << 8) + data;
579 
580 }
581 
582 /*************************************************************************/
587 void uart1_putc(unsigned char data)
588 {
589  unsigned char tmphead;
590 
591 
592  tmphead = (UART1_TxHead + 1) & UART_TX_BUFFER_MASK;
593 
594  while ( tmphead == UART1_TxTail ){
595  ;
596  }
597 
598  UART1_TxBuf[tmphead] = data;
599  UART1_TxHead = tmphead;
600 
602  UART1_CONTROL |= _BV(UART1_UDRIE);
603 
604 }
605 
606 /*************************************************************************/
611 void uart1_puts(const char *s )
612 {
613  while (*s)
614  uart1_putc(*s++);
615 
616 }
617 
618 /*************************************************************************/
623 void uart1_puts_p(const char *progmem_s )
624 {
625  register char c;
626 
627  while ( (c = pgm_read_byte(progmem_s++)) )
628  uart1_putc(c);
629 
630 }
631 
632 #endif
#define UART_NO_DATA
Definition: uart.h:96
void uart1_puts_p(const char *s)
Put string from program memory to ringbuffer for transmitting via USART1 (only available on selected ...
#define UART_RX_BUFFER_SIZE
Definition: uart.h:78
void uart1_putc(unsigned char data)
Put byte to ringbuffer for transmitting via USART1 (only available on selected ATmega) ...
void uart_puts(const char *s)
Put string to ringbuffer for transmitting via UART.
Definition: uart.c:440
unsigned int uart_getc(void)
Get received byte from ringbuffer.
Definition: uart.c:390
void uart1_init(unsigned int baudrate)
Initialize USART1 (only available on selected ATmegas)
#define UART_TX_BUFFER_SIZE
Definition: uart.h:82
#define UART_TX_BUFFER_MASK
Definition: uart.c:53
#define UART_BUFFER_OVERFLOW
Definition: uart.h:95
void uart_puts_p(const char *progmem_s)
Put string from program memory to ringbuffer for transmitting via UART.
Definition: uart.c:452
void uart_init(unsigned int baudrate)
Initialize UART and set baudrate.
Definition: uart.c:313
#define UART_RX_BUFFER_MASK
Definition: uart.c:52
unsigned int uart1_getc(void)
Get received byte of USART1 from ringbuffer. (only available on selected ATmega)
SIGNAL(UART0_RECEIVE_INTERRUPT)
Definition: uart.c:248
void uart_putc(unsigned char data)
Put byte to ringbuffer for transmitting via UART.
Definition: uart.c:416
void uart1_puts(const char *s)
Put string to ringbuffer for transmitting via USART1 (only available on selected ATmega) ...